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| (R) ACST6 OVER VOLTAGE PROTECTED AC POWER SWITCH ASD (Application Specific Devices) MAIN APPLICATIONS AC static switching in appliance & industrial control systems Induction motor drive actuator for: - Refrigerator / Freezer compressor - Dishwasher spray pump - Clothes drier tumble Actuator for the thermostat of a refrigerator or COM COM freezer OUT G OUT COM G OUT COM TO-220AB ACST6-7ST OUT TO-220FPAB ACST6-7SFP OUT FEATURES VDRM /VRRM = +/- 700V Avalanche controlled device IT(RMS) = 1.5 A with no heat sink and Tamb = 40 C IT(RMS) = 6A with Tcase = 105 C High noise immunity: static dV/dt > 200 V/s Gate triggering current : IGT < 10 mA Snubberless turn off commutation: (dI/dt)c > 3.5A/ms D2PAK, I2PAK, TO-220FPAB or TO-220AB package G COM G OUT COM D2PAK ACST6-7SG I2PAK ACST6-7SR Table 1: Order Codes Part Numbers ACST6-7ST ACST6-7SFP ACST6-7SG ACST6-7SR Marking BENEFITS Enables equipment to meet IEC61000-4-5 standards High off-state reliability with planar technology Needs no external overvoltage protection Direct interface with the microcontroller Reduces the power component count DESCRIPTION The ACST6-7Sx belongs to the AC power switch family built around the ASD technology. This high performance device is adapted to home appliances or industrial systems and drives an induction motor up to 6A. This ACST switch embeds a triac structure with a high voltage clamping device to absorb the inductive turn-off energy and withstand line transients such as those described in the IEC61000-4-5 standards. ACST67S Figure 1: Functional Diagram OUT G COM May 2005 REV. 8 1/10 ACST6 Table 2: Absolute Ratings (limiting values) Symbol VDRM/ VRRM Parameter Repetitive peak off-state voltage RMS on-state current full cycle sine wave 50 to 60 Hz, no heat sink RMS on-state current full cycle sine wave 50 to 60 Hz, TO-220AB package Non repetitive surge peak on-state current Tj initial = 25 C, full cycle sine wave Thermal constraint for fuse selection Non repetitive on-state current critical rate of rise IG = 10mA (tR < 100ns) Non repetitive line peak pulse voltage (see note 1) Storage temperature range Operating junction temperature range Maximum lead soldering temperature during 10s Tj = 125 C Tamb = 40 C Tcase = 105 C tp = 20ms tp = 16.7ms tp = 10ms Rate period > 1mn Value 700 1.5 6 45 50 11 100 2 - 40 to + 150 - 30 to + 125 260 Unit V A A A A A 2s A/s kV C C C IT(RMS) ITSM I2t dI/dt VPP Tstg Tj Tl Note 1: according to test described by IEC61000-4-5 standard and figure 3. Table 3: Gate Characteristics (maximum values) Symbol PG (AV) PGM IGM Parameter Average gate power dissipation Peak gate power dissipation (tp = 20s) Peak gate current (tp = 20s) Value 0.1 10 1 Unit W W A Table 4: Thermal Resistances Symbol Rth(j-a) Rth(j-a) Rth(j-a) Rth(j-c) Rth(j-c) Junction to ambient I2PAK Junction to ambient D2PAK soldered on 1 cm2 copper pad Parameter Junction to ambient TO-220AB / TO-220FPAB Value 60 65 45 2.5 3.5 C/W C/W Unit Junction to case for full cycle sine wave conduction (TO-220AB) Junction to case for full cycle sine wave conduction (TO-220FPAB) 2/10 (R) ACST6 Table 5: Parameter Description Parameter Symbol IGT VGT VGD IH IL VTM VT0 Rd IDRM / IRRM dV/dt (dI/dt)c VCL Parameter description Gate triggering current Gate triggering voltage Non triggering voltage Holding current Latching current On state voltage On state characteristic threshold voltage On state characteristic dynamic resistance Forward or reverse leakage current Static pin OUT voltage rise Turn off current rate of decay Avalanche voltage at turn off Table 6: Electrical Characteristics For either positive or negative polary of pin OUT voltage respect to pin COM voltage Symbol IGT VGT VGD IH IL VTM VTM VT0 Rd IDRM IRRM dV/dt (dI/dt)c (dI/dt)c VCL VOUT = VDRM VOUT = VRRM VOUT = 600V (dI/dt)c = 15V/s (dI/dt)c = 15V/s IOUT < 0 Rgk = 150 ICL = 1mA tp = 1ms gate open Test conditions VOUT = 12V (DC) RL = 33 VOUT = 12V (DC) RL = 33 VOUT = VDRM IOUT = 100mA IG = 20mA IOUT = 2.1A IOUT = 8.5A tp = 380s tp = 380s RL = 3.3 Gate open Tj = 25C Tj = 25C Tj = 125C Tj = 25C Tj = 25C Tj = 25C Tj = 25C Tj = 125C Tj = 125C Tj = 25C Tj = 125C Tj = 125C Tj = 125C Tj = 125C Tj = 25C MAX. MAX. MIN. MAX. MAX. MAX. MAX. MAX. MAX. MAX. MAX. MIN. MIN. MIN. TYP. Value 10 1.5 0.2 25 50 1.4 1.7 0.9 80 20 500 200 3 3.5 1100 Unit mA V V mA mA V V V m A A V/s A/ms A/ms V (R) 3/10 ACST6 AC LINE SWITCH BASIC APPLICATION The ACST6-7S device is especially designed to drive medium power induction motors in refrigerators, dish washers, and tumble dryers. Pin COM : Common drive reference, to be connected to the power line neutral Pin G : Switch Gate input to be connected to the controller Pin OUT : Switch Output to be connected to the load When driven from a low voltage controller, the ACST switch is triggered with a negative gate current flowing out of the gate pin G. It can be directly driven by the controller through a resistor as shown on the typical application diagram. In appliance systems, the ACST6-7S switch intends to drive medium power load in ON / OFF full cycle or phase angle control mode. Thanks to its thermal and turn-off commutation characteristics, the ACST6-7S switch is able to drive an inductive load up to 6A without a turn-off aid snubber circuit. Figure 2: Typical Application Diagram Run Start Run Start OUT OUT G G COM COM ST 62/72 MCU ST 62/72 MCU AC LINE TRANSIENT VOLTAGE RUGGEDNESS The ACST6-7S switch is able to safely withstand the AC line transient voltages either by clamping the low energy spikes or by breaking over under high energy shocks. The test circuit in figure 3 is representative of the ACST application and is used to test the ACST switch according to the IEC61000-4-5 standard conditions. Thanks to the load impedance, the ACST switch withstands voltage spikes up to 2 kV above the peak line voltage by breaking over safely. Such non-repetitive testing can be done 10 times on each AC line voltage polarity. Figure 3: Overvoltage ruggedness test circuit for resistive and inductive loads according to IEC61000-4-5 standard R = 10, L = 5H & VPP = 2kV R L OUT SURGE VOLTAGE AC LINE & GENERATOR VAC + VPP G COM 4/10 (R) ACST6 Figure 4: Maximum power dissipation versus RMS on-state current (full cycle) P(W) 8 7 6 5 4 4 3 3 2 1 0 0 1 2 2 1 7 TO-220AB, D2PAK & I2PAK Figure 5: RMS on-state current versus case temperature (full cycle) IT(RMS)(A) 6 TO-220FPAB 5 IT(RMS)(A) 3 4 5 6 TC(C) 0 0 25 50 75 100 125 Figure 6: RMS on-state current versus ambient temperature (printed circuit board FR4, copper thickness: 35m), full cycle IT(RMS)(A) 3.0 2.5 2.0 1.5 TO-220FPAB, TO-220AB & I2PAK Free air D2PAK S=1cm2 Figure 7: Relative variation of thermal impedance versus pulse duration K=[Zth/Rth] 1E+0 Zth(j-c) TO-220AB, D2PAK & I2PAK 1E-1 Zth(j-c) TO-220FPAB Zth(j-a) 1.0 0.5 1E-2 Tamb(C) 0.0 0 25 50 75 100 125 1E-3 1E-3 1E-2 1E-1 tp(C) 1E+0 1E+1 1E+2 5E+2 Figure 8: On-state characteristics (maximum values) ITM(A) 50.0 Figure 9: Surge peak on-state current versus number of cycles ITSM(A) 50 45 10.0 Tj max. VT0 = 0.9V Rd = 80m 40 35 30 25 Non repetitive Tj initial=25C t=20ms 1.0 20 15 10 Repetitive Tc=105C VTM(V) 0.1 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 5 0 1 10 Number of cycles 100 1000 (R) 5/10 ACST6 Figure 10: Non repetitive surge peak on-state current for a sinusoidal pulse with width tp < 10ms, and corresponding value of I2t ITSM(A), I t (A s) 1000 Tj initial=25C 2 2 Figure 11: Relative variation of gate trigger current, holding current and latching current versus junction temperature (typical values) IGT, IH,IL[Tj] / IGT, IH, IL[Tj=25C] 3.0 2.5 dI/dt limitation: 100A/s 100 ITSM 2.0 IGT QIII 1.5 I2t 10 1.0 0.5 IGT QI, QII, IH & IL tp(ms) 1 0.01 0.10 1.00 10.00 Tj(C) 0.0 -40 -20 0 20 40 60 80 100 120 140 Figure 12: Relative variation of critical rate of decrease of main current versus reapplied (dV/ dt)c (typical values) (dI/dt)c [(dV/dt)c] / Specified (dI/dt)c 4.0 3.5 3.0 2.5 2.0 1.5 Tj = 125C Figure 13: Relative variation of critical rate of decrease of main current versus junction temperature (dI/dt)c[Tj] / (dI/dt)c[Tj=125C] 6 5 4 3 2 1.0 0.5 0.0 0.1 1.0 10.0 100.0 (dV/dt)c (V/s) 1 Tj(C) 0 0 25 50 75 100 125 Figure 14: Relative variation of dV/dt immunity versus junction temperature for different values of gate to com resistance (gate open is the reference value) dV/dt[Tj] / dV/dt[Tj=125C] 4.0 3.5 3.0 2.5 2.0 1.5 Gate open Rgk = 1kW Rgk = 470W Rgk < 220W Figure 15: Thermal resistance junction to ambient versus copper surface under tab (printed circuit board FR4, copper thickness: 35m) (D2PAK) Rth(j-a)(C/W) 70 60 50 40 30 1.0 0.5 0.0 0 25 50 75 100 125 150 20 10 Tj(C) 0 0 2 4 6 S(Cu)(cm) 8 10 12 14 16 18 20 6/10 (R) ACST6 Figure 16: Ordering Information Scheme ACS T 6 - 7 S T AC Switch Topology T = Triac RMS on-state current 6 = 6A Repetitive peak off-state voltage 7 = 700V Triggering gate current S = 10mA Package FP = TO-220FPAB T = TO-220AB G = D2PAK R = I2PAK Figure 17: D2PAK Package Mechanical Data REF. A E L2 C2 D L L3 A1 B2 B G A2 R C M * V2 * FLAT ZONE NO LESS THAN 2mm A A1 A2 B B2 C C2 D E G L L2 L3 M R V2 DIMENSIONS Millimeters Inches Min. Max. Min. Max. 4.40 4.60 0.173 0.181 2.49 2.69 0.098 0.106 0.03 0.23 0.001 0.009 0.70 0.93 0.027 0.037 1.14 1.70 0.045 0.067 0.45 0.60 0.017 0.024 1.23 1.36 0.048 0.054 8.95 9.35 0.352 0.368 10.00 10.40 0.393 0.409 4.88 5.28 0.192 0.208 15.00 15.85 0.590 0.624 1.27 1.40 0.050 0.055 1.40 1.75 0.055 0.069 2.40 3.20 0.094 0.126 0.40 Typ. 0.016 Typ. 0 8 0 8 Figure 18: Foot Print Dimensions (in millimeters) 16.90 10.30 1.30 5.08 8.90 3.70 (R) 7/10 ACST6 Figure 19: TO-220AB Package Mechanical Data REF. H2 Dia L5 L7 L6 L2 F2 F1 L9 L4 F G1 G M E D C A A C D E F F1 F2 G G1 H2 L2 L4 L5 L6 L7 L9 M Diam. DIMENSIONS Millimeters Inches Min. Max. Min. Max. 4.40 4.60 0.173 0.181 1.23 1.32 0.048 0.051 2.40 2.72 0.094 0.107 0.49 0.70 0.019 0.027 0.61 0.88 0.024 0.034 1.14 1.70 0.044 0.066 1.14 1.70 0.044 0.066 4.95 5.15 0.194 0.202 2.40 2.70 0.094 0.106 10 10.40 0.393 0.409 16.4 typ. 0.645 typ. 13 14 0.511 0.551 2.65 2.95 0.104 0.116 15.25 15.75 0.600 0.620 6.20 6.60 0.244 0.259 3.50 3.93 0.137 0.154 2.6 typ. 0.102 typ. 3.75 3.85 0.147 0.151 Figure 20: I2PAK Package Mechanical Data DIMENSIONS REF. A E L2 D C2 Millimeters Min. Max. 4.60 2.69 0.93 1.7 0.60 1.36 9.35 10.4 5.28 17.5 1.40 14.42 4.40 2.49 0.70 1.14 0.45 1.23 8.95 10.0 4.88 16.7 1.27 13.82 Inches Min. 0.173 0.098 0.027 0.045 0.018 0.048 0.352 0.394 0.192 0.657 0.050 0.544 Max. 0.181 0.106 0.037 0.067 0.024 0.053 0.368 0.409 0.208 0.689 0.055 0.568 A A1 B L L3 Cropping direction B2 C C2 A1 G C B2 B D E G L L2 L3 8/10 (R) ACST6 Figure 21: TO-220FPAB Package Mechanical Data DIMENSIONS Millimeters Inches Min. Max. Min. Max. 4.4 4.6 0.173 0.181 2.5 2.7 0.098 0.106 2.5 2.75 0.098 0.108 0.45 0.70 0.018 0.027 0.75 1 0.030 0.039 1.15 1.70 0.045 0.067 1.15 1.70 0.045 0.067 4.95 5.20 0.195 0.205 2.4 2.7 0.094 0.106 10 10.4 0.393 0.409 16 Typ. 0.63 Typ. 28.6 30.6 1.126 1.205 9.8 10.6 0.386 0.417 2.9 3.6 0.114 0.142 15.9 16.4 0.626 0.646 9.00 9.30 0.354 0.366 3.00 3.20 0.118 0.126 REF. A H B Dia L6 L2 L3 L5 F1 L4 F2 D L7 F G1 G E A B D E F F1 F2 G G1 H L2 L3 L4 L5 L6 L7 Dia. Table 7: Ordering Information Ordering type ACST6-7ST ACST6-7SG ACST6-7SFP ACST6-7SR Marking ACST67S ACST67S ACST67S ACST67S Package TO-220AB D2PAK TO-220FPAB I 2PAK Weight 2.3 g 1.5 g 2.4 g 1.5 g Base qty 50 50 50 50 Delivery mode Tube Tube Tube Tube Epoxy meets UL94,V0 Table 8: Revision History Date Jan-2002 09-May-2005 Revision 7F 8 Last issue. Layout update. No content change. Description of Changes (R) 9/10 ACST6 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners (c) 2005 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 10/10 (R) |
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